The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 17, 2023
Filed:
Apr. 28, 2022
Applicant:
Hangzhou Guangzhiyuan Technology Co., Ltd., Hangzhou, CN;
Inventors:
Assignee:
Hangzhou Guangzhiyuan Technology Co., Ltd., Hangzhou, CN;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G02B 6/42 (2006.01); H01S 5/0234 (2021.01); H01S 5/02218 (2021.01); G02B 6/293 (2006.01); H01L 25/16 (2023.01); H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
G02B 6/4215 (2013.01); G02B 6/29304 (2013.01); G02B 6/424 (2013.01); G02B 6/4239 (2013.01); H01L 24/05 (2013.01); H01L 24/13 (2013.01); H01L 24/16 (2013.01); H01L 24/17 (2013.01); H01L 24/81 (2013.01); H01L 25/167 (2013.01); H01S 5/0234 (2021.01); H01S 5/02218 (2021.01); H01L 2224/0557 (2013.01); H01L 2224/13025 (2013.01); H01L 2224/16145 (2013.01); H01L 2224/16227 (2013.01); H01L 2224/17181 (2013.01); H01L 2224/81986 (2013.01);
Abstract
The present disclosure provides a three-dimensional packaging method and a three-dimensional package structure of a photonic-electronic chip. The method includes: fixing an electronic chip on a first area of a first surface of a photonic chip; fixing a dummy chip on a second area of the first surface of the photonic chip, wherein the photonic chip is provided with an optical coupling interface at the second area, and the dummy chip has a cavity with a single-sided opening, and the opening of the cavity faces and covers an optical coupling interface.