Memory circuitry and method used in forming memory circuitry

Abstract

A method used in forming memory circuitry comprises forming transistors individually comprising one source/drain region and another source/drain region. A channel region is between the one and the another source/drain regions. A conductive gate is operatively proximate the channel region. Conductive vias are formed that are individually directly electrically coupled to the another source/drain region. Conductor material is formed that is directly coupled to the one source/drain region. The conductor material is patterned in one direction to form horizontal lines of the conductor material that have a horizontal trench between immediately-adjacent of the horizontal conductor-material lines. In a self-aligned manner, digitlines are formed that are individually in individual of the trenches between the immediately-adjacent conductor-material lines. After forming the digitlines, the conductor material is patterned in another direction that is horizontally angled from the one direction to form conductor vias that are individually directly electrically coupled to the one source/drain region. A plurality of storage elements is formed that are individually directly electrically coupled to individual of the conductor vias. Other aspects, including structure independent of method, are disclosed.