The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 10, 2023

Filed:

Apr. 26, 2021
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Hui-Jung Kim, Seongnam-si, KR;

Min Hee Cho, Suwon-si, KR;

Bong-Soo Kim, Yongin-si, KR;

Junsoo Kim, Seongnam-si, KR;

Satoru Yamada, Yongin-si, KR;

Wonsok Lee, Suwon-si, KR;

Yoosang Hwang, Suwon-si, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10B 12/00 (2023.01); H01L 21/28 (2006.01); H01L 29/49 (2006.01); H01L 29/06 (2006.01);
U.S. Cl.
CPC ...
H10B 12/34 (2023.02); H01L 21/28088 (2013.01); H01L 29/0649 (2013.01); H01L 29/4966 (2013.01); H10B 12/053 (2023.02); H10B 12/315 (2023.02); H10B 12/488 (2023.02);
Abstract

Semiconductor memory devices are provided. A semiconductor memory device includes an isolation layer in a first trench and a first gate electrode portion on the isolation layer. The semiconductor memory device includes a second gate electrode portion in a second trench. In some embodiments, the second gate electrode portion is wider, in a direction, than the first gate electrode portion. Moreover, in some embodiments, an upper region of the second trench is spaced apart from the first trench by a greater distance, in the direction, than a lower region of the second trench. Related methods of forming semiconductor memory devices are also provided.


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