The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 10, 2023

Filed:

Sep. 23, 2020
Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventors:

Katsuyuki Sakuma, Fishkill, NY (US);

Krishna R. Tunga, Wappingers Falls, NY (US);

Shidong Li, Hopewell Junction, NY (US);

Griselda Bonilla, Hopewell Junction, NY (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/00 (2006.01); H01L 21/48 (2006.01);
U.S. Cl.
CPC ...
H01L 24/81 (2013.01); H01L 21/4853 (2013.01); H01L 24/13 (2013.01); H01L 24/14 (2013.01); H01L 24/16 (2013.01); H01L 2224/13023 (2013.01); H01L 2224/14132 (2013.01); H01L 2224/16238 (2013.01); H01L 2224/81193 (2013.01); H01L 2224/81194 (2013.01); H01L 2224/81203 (2013.01);
Abstract

An integrated circuit package substrate (ICPS) system includes a die including a first array of connectors and a substrate including a second array of connectors that is configured to be thermocompression bonded to the first array of connectors at a bonding temperature that is above a solder melting temperature. The first die is bonded to the substrate such that the first die is asymmetric with respect to a substrate center, and the second array of connectors is adjusted, at an alignment temperature that is below the solder melting temperature, for thermal expansion to the bonding temperature with respect to a reference point that is not a first die center.


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