The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 03, 2023

Filed:

Sep. 30, 2021
Applicant:

Hefechip Corporation Limited, Sai Ying Pun, HK;

Inventors:

Geeng-Chuan Chern, Cupertino, CA (US);

Liang-Choo Hsia, Hsinchu, TW;

Assignee:

HeFeChip Corporation Limited, Sai Ying Pun, HK;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10B 12/00 (2023.01); H01L 49/02 (2006.01);
U.S. Cl.
CPC ...
H01L 28/87 (2013.01); H10B 12/0387 (2023.02); H10B 12/312 (2023.02);
Abstract

A semiconductor memory device includes a substrate; a film stack on the substrate; a silicon device layer on the film stack; and a trench with corrugated sidewall surface extending into the silicon device layer, the film stack, and the substrate. A trench capacitor is located in the trench. The trench capacitor includes an inner electrode and an outer electrode with a node dielectric layer therebetween. The node dielectric layer is in direct with the film stack and the bulk semiconductor substrate. A transistor is disposed on the substrate. The transistor includes a source region and a drain region, a channel region between the source region and the drain region, and a gate over the channel region. The source region is electrically connected to the inner electrode of the trench capacitor.


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