The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 03, 2023
Filed:
Apr. 04, 2022
Applicant:
Cadence Design Systems, Inc., San Jose, CA (US);
Inventors:
Igor Keller, Pleasanton, CA (US);
Xiaopeng Dong, San Jose, CA (US);
Sourabh Rajguru, La Jolla, CA (US);
Assignee:
Cadence Design Systems, Inc., San Jose, CA (US);
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 30/30 (2020.01); G06F 30/3315 (2020.01); G06F 119/12 (2020.01);
U.S. Cl.
CPC ...
G06F 30/3315 (2020.01); G06F 2119/12 (2020.01);
Abstract
Various embodiments provide a charge model for a cell instance for delay calculation of a circuit design that includes the cell instance, where the charge model can be part of electronic design automation (EDA) and used in timing analysis of a circuit design that includes the cell instance. The charge model generated by an embodiment can predict a charge at an input of a cell instance for an arbitrary input voltage waveform and can address (e.g., reduce or negate) a time delay impact the Miller effect has on the cell instance.