The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 26, 2023

Filed:

Oct. 31, 2022
Applicant:

Innoscience (Zhuhai) Technology Co., Ltd., Zhuhai, CN;

Inventors:

Hang Liao, Zhuhai, CN;

Qiyue Zhao, Zhuhai, CN;

Chang An Li, Zhuhai, CN;

Chao Wang, Zhuhai, CN;

Chunhua Zhou, Zhuhai, CN;

King Yuen Wong, Zhuhai, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/778 (2006.01); H01L 29/06 (2006.01); H01L 29/20 (2006.01); H01L 29/40 (2006.01);
U.S. Cl.
CPC ...
H01L 29/7787 (2013.01); H01L 29/0619 (2013.01); H01L 29/2003 (2013.01); H01L 29/404 (2013.01);
Abstract

A semiconductor device includes a channel layer, a barrier layer, source contact and a drain contact, a doped group III-V layer, and a gate electrode. The barrier layer is positioned above the channel layer. The source contact and the drain contact are positioned above the barrier layer. The doped group III-V layer is positioned above the barrier layer and between the first drain contact and the first source contact. The first doped group III-V layer has a first non-vertical sidewall and a second non-vertical sidewall. The gate electrode is positioned above the doped group III-V layer and has a third non-vertical sidewall and a fourth non-vertical sidewall. A horizontal distance from the first non-vertical sidewall to the third non-vertical sidewall is different than a horizontal distance from the second non-vertical sidewall to the fourth non-vertical sidewall.


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