Methods of reducing program disturb by array source coupling in 3d nand memory devices

Abstract

The present disclosure provides a three-dimensional NAND memory device, comprising a first NAND string including a first channel corresponding to a first cell to be inhibited to program, and a controller configured to control a word line driver and a bit line driver to do the following operations: prior to applying a program voltage to a selected word line, charging a first bit line electrically coupling with the first channel to a first voltage level for charging the first channel to the first voltage level, charging an array common source electrically coupling with the first bit line for further charging the first channel to a second voltage level higher than the first voltage level, and cutting off the electrical coupling between the first bit line and the first channel for preparing to apply the program voltage to the selected word line.