The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 26, 2023

Filed:

Jun. 22, 2022
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventors:

Yu-Ching Lee, Kaohsiung, TW;

Yu-Piao Fang, Tainan, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G03F 7/20 (2006.01); G03F 7/00 (2006.01); G03F 9/00 (2006.01); B82Y 20/00 (2011.01);
U.S. Cl.
CPC ...
G03F 7/70633 (2013.01); G03F 7/2022 (2013.01); G03F 7/70466 (2013.01); G03F 7/70625 (2013.01); G03F 7/70641 (2013.01); G03F 7/70683 (2013.01); G03F 9/7076 (2013.01); B82Y 20/00 (2013.01);
Abstract

Methods for manufacturing a semiconductor structure are provided. A substrate is provided. A metrology target is formed in a layer over the substrate according to a first layer mask and a second layer mask. The metrology target includes a first pattern formed by a plurality of first photonic crystals corresponding to the first layer mask and a second pattern formed by a plurality of second photonic crystals corresponding to the second layer mask. First light is provided to illuminate the metrology target. Second light is received from the metrology target in response to the first light. The second light is analyzed to detect overlay-shift between the first pattern and the second pattern. The first pattern and the second pattern are arranged to cross in one direction in the metrology target.


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