The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 19, 2023

Filed:

Feb. 26, 2021
Applicant:

Micron Technology, Inc., Boise, ID (US);

Inventors:

Agostino Pirovano, Milan, IT;

Andrea Redaelli, Casatenovo, IT;

Fabio Pellizzer, Boise, ID (US);

Innocenzo Tortorelli, Cernusco sul Naviglio, IT;

Assignee:

Micron Technology, Inc., Boise, ID (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/24 (2006.01); H01L 27/115 (2017.01); H01L 45/00 (2006.01); H10B 63/00 (2023.01); H10B 69/00 (2023.01); H10N 70/20 (2023.01); H10N 70/00 (2023.01);
U.S. Cl.
CPC ...
H10B 63/20 (2023.02); H10B 63/30 (2023.02); H10B 63/845 (2023.02); H10B 69/00 (2023.02); H10N 70/20 (2023.02); H10N 70/231 (2023.02); H10N 70/8828 (2023.02); H10N 70/8836 (2023.02);
Abstract

In an example, a memory array may include a plurality of first dielectric materials and a plurality of stacks, where each respective first dielectric material and each respective stack alternate, and where each respective stack comprises a first conductive material and a storage material. A second conductive material may pass through the plurality of first dielectric materials and the plurality of stacks. Each respective stack may further include a second dielectric material between the first conductive material and the second conductive material.


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