The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 05, 2023

Filed:

Jan. 11, 2022
Applicant:

Cadence Design Systems, Inc., San Jose, CA (US);

Inventors:

Steev Wilcox, San Jose, CA (US);

Daniel Fernandes, San Jose, CA (US);

Assignee:

Cadence Design Systems, Inc., San Jose, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 30/323 (2020.01); G06F 111/20 (2020.01); G06F 111/08 (2020.01); G06F 119/06 (2020.01);
U.S. Cl.
CPC ...
G06F 30/323 (2020.01); G06F 2111/08 (2020.01); G06F 2111/20 (2020.01); G06F 2119/06 (2020.01);
Abstract

Embodiments include herein are directed towards a system and method for estimating glitch power associated with an emulation process is provided. Embodiments may include accessing, using a processor, information associated with an electronic design database and generating cycle accurate waveform information at each node of a netlist based upon, at least in part, a portion of the electronic design database. Embodiments may further include generating a probability-based model for a plurality of inputs associated with the netlist and determining one or more partial glitch transitions from each probability-based model. Embodiments may also include combining the one or more partial glitch transitions with the cycle accurate waveform information to obtain a glitch power estimation.


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