The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 29, 2023
Filed:
Jan. 18, 2022
Applicant:
Applied Materials, Inc., Santa Clara, CA (US);
Inventors:
Kurtis Leschkies, San Jose, CA (US);
Han-Wen Chen, Cupertino, CA (US);
Steven Verhaverbeke, San Francisco, CA (US);
Giback Park, San Jose, CA (US);
Kyuil Cho, Santa Clara, CA (US);
Jeffrey L. Franklin, Albuquerque, NM (US);
Wei-Sheng Lei, San Jose, CA (US);
Assignee:
Applied Materials, Inc., Santa Clara, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 25/065 (2023.01); H01L 23/495 (2006.01); H05K 1/14 (2006.01); H01L 23/522 (2006.01); H01L 25/00 (2006.01);
U.S. Cl.
CPC ...
H01L 25/0657 (2013.01); H01L 23/49586 (2013.01); H01L 23/5226 (2013.01); H01L 25/50 (2013.01); H05K 1/144 (2013.01);
Abstract
The present disclosure generally relates to stacked miniaturized electronic devices and methods of forming the same. More specifically, embodiments described herein relate to semiconductor device spacers and methods of forming the same. The semiconductor device spacers described herein may be utilized to form stacked semiconductor package assemblies, stacked PCB assemblies, and the like.