The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 15, 2023

Filed:

Aug. 16, 2021
Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventors:

Juntao Li, Cohoes, NY (US);

Kangguo Cheng, Schenectady, NY (US);

Ruilong Xie, Niskayuna, NY (US);

Chanro Park, Clifton Park, NY (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/78 (2006.01); H01L 27/092 (2006.01); H01L 29/66 (2006.01); H01L 21/8238 (2006.01);
U.S. Cl.
CPC ...
H01L 29/785 (2013.01); H01L 21/823814 (2013.01); H01L 21/823821 (2013.01); H01L 21/823885 (2013.01); H01L 27/0924 (2013.01); H01L 29/66666 (2013.01); H01L 29/66795 (2013.01); H01L 29/7827 (2013.01);
Abstract

A method of forming a vertical transistor is provided. The method includes forming a first set of vertical fins in a first row on a first bottom source/drain layer, and a second set of vertical fins in a second row on a second bottom source/drain layer, wherein the vertical fins in the same row are separated by a spacing with a sidewall-to-sidewall distance, S, and the vertical fins in the same column of adjacent rows are separated by a gap having a gap distance, G. The method further includes forming a gate metal layer on the first set of vertical fins and the second set of vertical fins, wherein the gate metal layer does not fill in the gap between vertical fins in the same column, and forming a cover layer plug in the remaining gap after forming the gate metal layer.


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