The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 15, 2023

Filed:

May. 28, 2021
Applicant:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;

Inventors:

Shich-Chang Suen, Hsinchu, TW;

Kei-Wei Chen, Tainan, TW;

Liang-Guang Chen, Hsinchu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/70 (2006.01); H01L 21/768 (2006.01); H01L 21/02 (2006.01); H01L 29/66 (2006.01); H01L 21/311 (2006.01); H01L 21/285 (2006.01); H01L 21/033 (2006.01); H01L 29/78 (2006.01); H01L 23/522 (2006.01); H01L 21/28 (2006.01); H01L 21/3105 (2006.01); H01L 21/8238 (2006.01); H01L 21/3213 (2006.01); H01L 21/32 (2006.01);
U.S. Cl.
CPC ...
H01L 21/76897 (2013.01); H01L 21/0217 (2013.01); H01L 21/02126 (2013.01); H01L 21/02211 (2013.01); H01L 21/02227 (2013.01); H01L 21/02271 (2013.01); H01L 21/02301 (2013.01); H01L 21/02312 (2013.01); H01L 21/0337 (2013.01); H01L 21/28247 (2013.01); H01L 21/28525 (2013.01); H01L 21/28568 (2013.01); H01L 21/3105 (2013.01); H01L 21/31116 (2013.01); H01L 21/31144 (2013.01); H01L 21/76802 (2013.01); H01L 21/76826 (2013.01); H01L 21/76829 (2013.01); H01L 21/823821 (2013.01); H01L 23/5226 (2013.01); H01L 29/66545 (2013.01); H01L 29/66795 (2013.01); H01L 29/785 (2013.01); H01L 21/32 (2013.01); H01L 21/32134 (2013.01); H01L 21/32135 (2013.01); H01L 29/7848 (2013.01);
Abstract

A method includes forming a first gate structure over a substrate, where the first gate structure is surrounded by a first dielectric layer; and forming a mask structure over the first gate structure and over the first dielectric layer, where forming the mask structure includes selectively forming a first capping layer over an upper surface of the first gate structure; and forming a second dielectric layer around the first capping layer. The method further includes forming a patterned dielectric layer over the mask structure, the patterned dielectric layer exposing a portion of the mask structure; removing the exposed portion of the mask structure and a portion of the first dielectric layer underlying the exposed portion of the mask structure, thereby forming a recess exposing a source/drain region adjacent to the first gate structure; and filling the recess with a conductive material.


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