The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 04, 2023

Filed:

Jul. 22, 2021
Applicant:

Micron Technology, Inc., Boise, ID (US);

Inventors:

Jianmin Huang, San Carlos, CA (US);

Deping He, Boise, ID (US);

Xiangang Luo, Fremont, CA (US);

Harish Reddy Singidi, Fremont, CA (US);

Kulachet Tanpairoj, Santa Clara, CA (US);

John Zhang, Shanghai, CN;

Ting Luo, Santa Clara, CA (US);

Assignee:

Micron Technology, Inc., Boise, ID (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 29/42 (2006.01); G11C 29/14 (2006.01); G11C 29/20 (2006.01); G11C 29/44 (2006.01); G11C 29/00 (2006.01);
U.S. Cl.
CPC ...
G11C 29/42 (2013.01); G11C 29/14 (2013.01); G11C 29/20 (2013.01); G11C 29/44 (2013.01); G11C 29/886 (2013.01);
Abstract

Disclosed in some examples are NAND devices, firmware, systems, methods, and devices that apply smart algorithms to process ECC errors by taking advantage of excess overprovisioning. In some examples, when the amount of overprovisioned blocks are above a predetermined threshold, a first ECC block error handling mode may be implemented and when the overprovisioned blocks are equal or less than the predetermined threshold, a second mode of ECC block error handling may be utilized.


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