The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 27, 2023

Filed:

Feb. 18, 2022
Applicant:

Unimicron Technology Corp., Taoyuan, TW;

Inventors:

Tzyy-Jang Tseng, Taoyuan, TW;

Chin-Sheng Wang, Taoyuan, TW;

Ra-Min Tain, Hsinchu County, TW;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H05K 1/18 (2006.01); H05K 1/02 (2006.01); H05K 1/09 (2006.01); H05K 1/03 (2006.01); H05K 1/11 (2006.01);
U.S. Cl.
CPC ...
H05K 1/0298 (2013.01); H05K 1/023 (2013.01); H05K 1/181 (2013.01); H05K 1/185 (2013.01); H05K 1/032 (2013.01); H05K 1/036 (2013.01); H05K 1/092 (2013.01); H05K 1/113 (2013.01); H05K 2201/0323 (2013.01);
Abstract

A circuit board structure includes a dielectric substrate, at least one embedded block, at least one electronic component, at least one first build-up circuit layer, and at least one second build-up circuit layer. The dielectric substrate includes a through cavity penetrating the dielectric substrate. The embedded block is fixed in the through cavity. The embedded block includes a first through hole and a second through hole. The electronic component is disposed in the through hole of the embedded block. The first build-up circuit layer is disposed on the top surface of the dielectric substrate and covers the embedded block. The second build-up circuit layer is disposed on the bottom surface of the dielectric substrate and covers the embedded block.


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