The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 20, 2023
Filed:
Jun. 17, 2021
Applicant:
Xilinx, Inc., San Jose, CA (US);
Inventors:
Sagheer Ahmad, Cupertino, CA (US);
Jaideep Dastidar, San Jose, CA (US);
Brian C. Gaide, Erie, CO (US);
Juan J. Noguera Serra, San Jose, CA (US);
Ian A. Swarbrick, Santa Clara, CA (US);
Assignee:
Xilinx, Inc., San Jose, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 19/17728 (2020.01); H03K 19/17736 (2020.01); H03K 19/17704 (2020.01);
U.S. Cl.
CPC ...
H03K 19/17728 (2013.01); H03K 19/17736 (2013.01); H03K 19/17712 (2013.01);
Abstract
A System-on-Chip includes a first partition configured to implement a first application using of at least a first portion of one or more of a plurality of subsystems of the System-on-Chip and a second partition configured to implement a second application concurrently with the first partition. The second application uses at least a second portion of one or more of the plurality of subsystems. The first partition is isolated from the second partition.