The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 13, 2023

Filed:

Feb. 27, 2020
Applicant:

Lam Research Corporation, Fremont, CA (US);

Inventors:

Fayaz Shaikh, Portland, OR (US);

Taide Tan, Tigard, OR (US);

Assignee:

Lam Research Corporation, Fremont, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
C23C 16/455 (2006.01); H01J 37/32 (2006.01); C23C 16/458 (2006.01); C23C 16/509 (2006.01);
U.S. Cl.
CPC ...
C23C 16/45565 (2013.01); C23C 16/4585 (2013.01); C23C 16/5096 (2013.01); H01J 37/32082 (2013.01); H01J 37/32623 (2013.01); H01J 37/32642 (2013.01); H01J 37/32715 (2013.01); H01J 2237/20 (2013.01); H01J 2237/332 (2013.01);
Abstract

A chamber for use in implementing a deposition process includes a pedestal for supporting a semiconductor wafer. A silicon ring is disposed over the pedestal and surrounds the semiconductor wafer. The silicon ring has a ring thickness that approximates a semiconductor wafer thickness. The silicon ring has an annular width that extends a process zone defined over the semiconductor wafer to an extended process zone that is defined over the semiconductor wafer and the silicon ring. A confinement ring defined from a dielectric material is disposed over the pedestal and surrounds the silicon ring. A showerhead having a central showerhead area and an extended showerhead area is also included. The central showerhead area is substantially disposed over the semiconductor wafer and the silicon ring. The extended showerhead area is substantially disposed over the confinement ring. The annular width of the silicon ring enlarges a surface area of the semiconductor wafer that is exposed and shifts non-uniformity effects of deposition materials over the semiconductor wafer from an edge of the semiconductor wafer to an outer edge of the silicon ring.


Find Patent Forward Citations

Loading…