The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 30, 2023
Filed:
Jan. 25, 2021
Rambus Inc., San Jose, CA (US);
Lap Wai Chow, South Pasadena, CA (US);
Bryan J. Wang, South Lake Tahoe, CA (US);
James P. Baukus, Westlake Village, CA (US);
Ronald P. Cocchi, Huntington Beach, CA (US);
RAMBUS INC., San Jose, CA (US);
Abstract
A camouflaged application specific integrated circuit is disclosed. The camouflaged ASIC includes at least one camouflaged FinFET, which includes a substrate of a first conductivity type, a fin, disposed on the substrate, the fin including a source region of a second conductivity type, a drain region of the second conductivity type, and a channel region of the first conductivity type. The camouflaged application specific integrated circuit also includes a gate disposed over and substantially perpendicular to the channel region, forming one or more transistor junctions with the fin. In one embodiment, the substrate includes a punch through stop (PTS) region of the second conductivity type disposed between the fin and the substrate, the PTS region electrically shorting the source region of the fin to the drain region of the fin.