The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 16, 2023
Filed:
Jun. 01, 2021
Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;
Chien-Kuo Su, Hsinchu, TW;
Chiting Cheng, Hsinchu, TW;
Pankaj Aggarwal, Hsinchu, TW;
Yen-Huei Chen, Hsinchu, TW;
Cheng Hung Lee, Hsinchu, TW;
Hung-Jen Liao, Hsinchu, TW;
Jonathan Tsung-Yung Chang, Hsinchu, TW;
Jhon Jhy Liaw, Hsinchu, TW;
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchut, TW;
Abstract
A memory macro includes a first memory cell array, a first tracking circuit, a first and a second transistor. The first memory cell array includes rows of memory cells and columns of memory cells. The first tracking circuit includes a first set of memory cells configured as a first set of loading cells responsive to a first control signal, a second set of memory cells configured as a first set of pull-down cells responsive to a second control signal, and a first tracking bit line coupled to the first and second set of memory cells. The first set of pull-down cells or loading cells is configured to track a memory cell of the first memory cell array. The first and second transistor are coupled to the first tracking bit line, and configured to charge the first tracking bit line to a pre-charge voltage level responsive to a tracking enable signal.