The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 09, 2023
Filed:
Mar. 11, 2021
Silicon Storage Technology, Inc., San Jose, CA (US);
Hieu Van Tran, San Jose, CA (US);
Anh Ly, San Jose, CA (US);
Thuan Vu, San Jose, CA (US);
Stanley Hong, San Jose, CA (US);
Feng Zhou, Fremont, CA (US);
Xian Liu, Sunnyvale, CA (US);
Nhan Do, Saratoga, CA (US);
SILICON STORAGE TECHNOLOGY, INC., San Jose, CA (US);
Abstract
Numerous embodiments of circuitry for a set-while-verify operation and a reset-while verify operation for resistive random access memory cells are disclosed. In one embodiment, a set-while-verify circuit for performing a set operation on a selected RRAM cell in the array applies a combination of voltages or current to a bit line, word line, and source line associated with the selected RRAM cell and stops said applying when the set operation is complete. In another embodiment, a reset-while-verify circuit for performing a reset operation on a selected RRAM cell in the array applies a combination of voltages or current to a bit line, word line, and source line associated with the selected RRAM cell and stops said applying when the reset operation is complete.