The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 02, 2023
Filed:
Jul. 07, 2022
Siltronic Ag, Munich, DE;
Timo Mueller, Burghausen, DE;
Michael Boy, Waging am See, DE;
Michael Gehmlich, Weissenborn, DE;
Andreas Sattler, Trostberg, DE;
SILTRONIC AG, Munich, DE;
Abstract
A method produces a single-crystal silicon semiconductor wafer. A single-crystal silicon substrate wafer is double side polished. A front side of the substrate wafer is chemical mechanical polished (CMP). An epitaxial layer of single-crystal silicon is deposited on the front side of the substrate wafer. A first rapid thermal anneal (RTA) treatment is performed on the coated substrate wafer at 1275-1295° C. for 15-30 seconds in argon and oxygen, having oxygen of 0.5-2.0 vol %. The coated substrate wafer is then cooled at or below 800° C., with 100 vol % argon. A second RTA treatment is performed on the coated substrate wafer at a 1280-1300° C. for 20-35 seconds in argon. An oxide layer is removed from a front side of the coated substrate wafer. The front side of the coated substrate wafer is polished by CMP.