The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 25, 2023

Filed:

Dec. 08, 2020
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventors:

Wang-Chun Huang, Kaohsiung, TW;

Hou-Yu Chen, Hsinchu County, TW;

Kuan-Lun Cheng, Hsinchu, TW;

Chih-Hao Wang, Hsinchu County, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/088 (2006.01); H01L 29/06 (2006.01); H01L 29/786 (2006.01); H01L 29/423 (2006.01); H01L 21/8234 (2006.01);
U.S. Cl.
CPC ...
H01L 27/088 (2013.01); H01L 21/823475 (2013.01); H01L 21/823481 (2013.01); H01L 29/0665 (2013.01); H01L 29/42392 (2013.01); H01L 29/78618 (2013.01); H01L 29/78696 (2013.01);
Abstract

A semiconductor device includes a gate structure, a source/drain epitaxial structure, a front-side interconnection structure, a backside via, an isolation material, and a sidewall spacer. The source/drain epitaxial structure is on a side of the gate structure. The front-side interconnection structure is on a front-side of the source/drain epitaxial structure. The backside via is connected to a backside of the source/drain epitaxial structure. The isolation material is on a side of the backside via and in contact with the gate structure. The sidewall spacer is sandwiched between the backside via and the isolation material. A height of the isolation material is greater than a height of the sidewall spacer.


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