The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 11632888 B1

Date of Patent:

Apr. 18, 2023

Filed:

Jan. 09, 2022

Rram structure with only part of variable resistive layer covering bottom electrode and method of fabricating the same

Applicant:

United Microelectronics Corp., Hsin-Chu, TW;

Inventors:

Wen-Jen Wang, Tainan, TW;

Chun-Hung Cheng, Kaohsiung, TW;

Chuan-Fu Wang, Miaoli County, TW;

Assignee:

UNITED MICROELECTRONICS CORP., Hsin-Chu, TW;

Attorney:

Winston Hsu

Primary Examiner:

Caleb E Henry

Int. Cl.

CPC ...

H10B 63/00 (2023.01); H10N 70/00 (2023.01); H01L 51/56 (2006.01);

U.S. Cl.

CPC ...

H10B 63/30 (2023.02); H10N 70/063 (2023.02); H10N 70/826 (2023.02);

Abstract

An RRAM structure includes a substrate. The substrate is divided into a memory cell region and a logic device region. A metal plug is disposed within the memory cell region. An RRAM is disposed on and contacts the metal plug. The RRAM includes a top electrode, a variable resistive layer, and a bottom electrode. The variable resistive layer is disposed between the top electrode and the bottom electrode. The variable resistive layer includes a first bottom surface. The bottom electrode includes a first top surface. The first bottom surface and the first top surface are coplanar. The first bottom surface only overlaps and contacts part of the first top surface.

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