The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 14, 2023
Filed:
Jul. 22, 2020
SK Hynix Nand Product Solutions Corp., San Jose, CA (US);
Thomas M. Slaight, Beaverton, OR (US);
Sivakumar Radhakrishnan, Portland, OR (US);
Mark Schmisseur, Phoenix, AZ (US);
Pankaj Kumar, Chandler, AZ (US);
Saptarshi Mondal, Chandler, AZ (US);
Sin S. Tan, Portland, OR (US);
David C. Lee, Beaverton, OR (US);
Marc T. Jones, Longmont, CO (US);
Geetani R. Edirisooriya, Tempe, AZ (US);
Bradley A. Burres, Waltham, MA (US);
Brian M. Leitner, Hillsboro, OR (US);
Kenneth C. Haren, Portland, OR (US);
Michael T. Klinglesmith, Portland, OR (US);
Matthew R. Wilcox, Ottawa, CA;
Eric J. Dahlen, Sherwood, OR (US);
SK hynix NAND Product Solutions Corp., Santa Clara, CA (US);
Abstract
In accordance with embodiments disclosed herein, there are provided methods, systems, mechanisms, techniques, and apparatuses for presentation of direct accessed storage under a logical drive model; for implementing a distributed architecture for cooperative NVM Data protection; data mirroring for consistent SSD latency; for boosting a controller's performance and RAS with DIF support via concurrent RAID processing; for implementing arbitration and resource schemes of a doorbell mechanism, including doorbell arbitration for fairness and prevention of attack congestion; and for implementing multiple interrupt generation using a messaging unit and NTB in a controller through use of an interrupt coalescing scheme.