The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 21, 2023

Filed:

May. 10, 2022
Applicant:

Shaoxing Yuanfang Semiconductor Co., Ltd., Shaoxin, CN;

Inventors:

Rakesh Kumar Gupta, Bangalore, IN;

Nitesh Naidu, Bangalore, IN;

Raja Prabhu J, Bangalore, IN;

Srinath Sridharan, Bangalore, IN;

Ankit Seedher, Bangalore, IN;

Shivam Agrawal, Bangalore, IN;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H03L 7/091 (2006.01); H03L 7/081 (2006.01); H03L 7/099 (2006.01);
U.S. Cl.
CPC ...
H03L 7/091 (2013.01); H03L 7/0814 (2013.01); H03L 7/0992 (2013.01);
Abstract

A phase-locked loop (PLL) provided according to an aspect of the present disclosure includes a phase detector, a low-pass filter, an oscillator, an output block and a phase locking block. The oscillator generates an intermediate clock and the output block generates each of successive cycles of a feedback clock on counting a pre-determined number of cycles of the intermediate clock. The phase locking block, upon detecting the PLL being out of phase-lock, controls the operation of the output block to obtain phase-lock in the PLL within two cycles of the input clock from the time of detection of the PLL being out of phase-lock.


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