The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 14, 2023
Filed:
Dec. 21, 2020
Alpha and Omega Semiconductor International Lp, Sunnyvale, CA (US);
Yan Xun Xue, Los Gatos, CA (US);
Long-Ching Wang, Cupertino, CA (US);
Lei Fukuda, Pleasanton, CA (US);
Adrian Chee Heong Koh, San Jose, CA (US);
Peter Wilson, Lathrop, CA (US);
Feng Ye, Shanghai, CN;
ALPHA AND OMEGA SEMICONDUCTOR INTERNATIONAL LP, Toronto, CA;
Abstract
A semiconductor package comprises a lead frame, a chip, and a molding encapsulation. The lead frame comprises one or more die paddles, a first plurality of leads, and a second plurality of leads. A respective end surface of each lead of the first plurality of leads and the second plurality of leads is plated with a metal. A first respective window on a first side of each lead of the first plurality of leads and the second plurality of leads is not plated with the metal. A second respective window on a second side of each lead of the first plurality of leads and the second plurality of leads is not plated with the metal. A method for fabricating a semiconductor package comprises the steps of providing a lead frame array, mounting a chip, forming a molding encapsulation, and applying a cutting process or a punching process.