The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 31, 2023

Filed:

Aug. 24, 2021
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventors:

Yun-Wei Cheng, Hsinchu, TW;

Chun-Wei Chia, Hsinchu, TW;

Chun-Hao Chou, Hsinchu, TW;

Kuo-Cheng Lee, Hsinchu, TW;

Ying-Hao Chen, Hsinchu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/146 (2006.01); H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H01L 27/14634 (2013.01); H01L 23/562 (2013.01); H01L 27/1463 (2013.01); H01L 27/1464 (2013.01); H01L 27/1469 (2013.01); H01L 27/14621 (2013.01); H01L 27/14636 (2013.01);
Abstract

A semiconductor structure includes a substrate having a pixel array region and a first seal ring region, wherein the first seal ring region surrounds the pixel array region, and the first seal ring region includes a first seal ring. The semiconductor structure further includes a first isolation feature in the first seal ring region, wherein the first isolation feature is filled with a dielectric material, and the first isolation feature is a continuous structure surrounding the pixel array region. The semiconductor structure further includes a second isolation feature between the first isolation feature and the pixel array region, wherein the second isolation feature is filled with the dielectric material.


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