The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 17, 2023

Filed:

Oct. 27, 2021
Applicant:

United Microelectronics Corp., Hsinchu, TW;

Inventors:

Chia-Jung Hsu, Tainan, TW;

Chin-Hung Chen, Tainan, TW;

Chun-Ya Chiu, Tainan, TW;

Chih-Kai Hsu, Tainan, TW;

Ssu-I Fu, Kaohsiung, TW;

Tsai-Yu Wen, Tainan, TW;

Shi You Liu, Kaohsiung, TW;

Yu-Hsiang Lin, New Taipei, TW;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/10 (2006.01); H01L 21/265 (2006.01); H01L 29/167 (2006.01); H01L 29/06 (2006.01);
U.S. Cl.
CPC ...
H01L 29/105 (2013.01); H01L 21/26506 (2013.01); H01L 29/0649 (2013.01); H01L 29/167 (2013.01);
Abstract

A method for fabricating of semiconductor device is provided, including providing a substrate. A first trench isolation and a second trench isolation are formed in the substrate. A portion of the substrate is etched to have a height between a top and a bottom of the first and second trench isolations. A germanium (Ge) doped layer region is formed in the portion of the substrate. A fluorine (F) doped layer region is formed in the portion of the substrate, lower than and overlapping with the germanium doped layer region. An oxidation process is performed on the portion of the substrate to form a gate oxide layer between the first and second trench isolations.


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