The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 03, 2023

Filed:

Sep. 30, 2020
Applicant:

X-fab Semiconductor Foundries Gmbh, Erfurt, DE;

Inventors:

Manoj Chandrika Reghunathan, Kuching, MY;

Peter Hofmann, Radeberg, DE;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/225 (2006.01); H01L 29/78 (2006.01); H01L 29/66 (2006.01); H01L 21/8238 (2006.01); H01L 29/08 (2006.01); H01L 29/06 (2006.01);
U.S. Cl.
CPC ...
H01L 29/7816 (2013.01); H01L 21/2253 (2013.01); H01L 21/823814 (2013.01); H01L 29/086 (2013.01); H01L 29/0865 (2013.01); H01L 29/0882 (2013.01); H01L 29/66681 (2013.01); H01L 29/66689 (2013.01); H01L 29/0653 (2013.01);
Abstract

A method of fabricating a laterally diffused metal oxide semiconductor transistor including providing a substrate, forming a first well of a first doping polarity type in the substrate, forming a gate on a portion of the first well, the gate including an oxide layer and an at least partially conductive layer on the oxide layer, and forming a mask on at least a portion of the gate and at least a portion of the first well, wherein the mask has a sloping edge. The method further includes forming a second well of a second doping polarity type at least partially in the first well by implanting ions in the first well, the second well extending under a portion of the gate, the second doping polarity type being of opposite type to the first doping polarity type. The method includes forming a first one of a source and drain of the first doping polarity type in or on the second well, thereby defining a channel of the transistor under the gate. The method further includes forming a second one of the source and drain of the first doping polarity type in or on the first well, wherein the implanting includes directing at least a first beam of ions towards the first well at an angle substantially perpendicular to a surface plane of the substrate, and directing at least a second beam of ions towards the first well at an angle substantially offset from a surface normal of the substrate.


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