The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 27, 2022

Filed:

Jul. 17, 2020
Applicant:

Tessera Llc, San Jose, CA (US);

Inventors:

Kangguo Cheng, Schenectady, NY (US);

Lawrence A. Clevenger, Saratoga Springs, NY (US);

Balasubramanian S. Pranatharthiharan, Watervliet, NY (US);

John Zhang, Altamont, NY (US);

Assignee:

TESSERA LLC, San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/8234 (2006.01); H01L 29/06 (2006.01); H01L 29/66 (2006.01); H01L 29/08 (2006.01); H01L 21/306 (2006.01); H01L 29/423 (2006.01); H01L 21/02 (2006.01); H01L 29/786 (2006.01); H01L 29/78 (2006.01); H01L 29/40 (2006.01); H01L 29/775 (2006.01); H01L 27/088 (2006.01);
U.S. Cl.
CPC ...
H01L 21/823418 (2013.01); H01L 21/02532 (2013.01); H01L 21/30604 (2013.01); H01L 21/823412 (2013.01); H01L 21/823431 (2013.01); H01L 21/823481 (2013.01); H01L 27/0886 (2013.01); H01L 29/0673 (2013.01); H01L 29/0847 (2013.01); H01L 29/401 (2013.01); H01L 29/42392 (2013.01); H01L 29/6653 (2013.01); H01L 29/6656 (2013.01); H01L 29/6681 (2013.01); H01L 29/66439 (2013.01); H01L 29/66545 (2013.01); H01L 29/66553 (2013.01); H01L 29/66742 (2013.01); H01L 29/66795 (2013.01); H01L 29/775 (2013.01); H01L 29/785 (2013.01); H01L 29/786 (2013.01); H01L 29/78696 (2013.01);
Abstract

A semiconductor device includes a first stack of nanowires above a substrate with a first gate structure over, around, and between the first stack of nanowires and a second stack of nanowires above the substrate with a second gate structure over, around, and between the second stack of nanowires. The device also includes a first source/drain region contacting a first number of nanowires of the first nanowire stack and a second source/drain region contacting a second number of nanowires of the second nanowire stack such that the first number and second number of contacted nanowires are different.


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