The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 27, 2022

Filed:

Aug. 23, 2019
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Julien Sebot, Portland, OR (US);

Edward A. Burton, Hillsboro, OR (US);

Nasser A. Kurd, Portland, OR (US);

Jonathan Douglas, Portland, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/00 (2006.01); G06F 8/41 (2018.01); H03L 7/08 (2006.01); G06F 9/30 (2018.01); G06F 15/76 (2006.01);
U.S. Cl.
CPC ...
G06F 8/4442 (2013.01); G06F 9/30047 (2013.01); H03L 7/08 (2013.01); G06F 2015/765 (2013.01);
Abstract

An apparatus and method is described that digitally coordinates dynamically adaptable clock and voltage supply to significantly reduce the energy consumed by a processor without impacting its performance or latency. A signal is generated that indicates a long latency operation. This signal is used to reduce power supply voltage and frequency of the adaptable clock. An early resume indicator is generated a few nanoseconds before normal operations are about to resume. This early resume signal is used to power up the power-downed voltage regulator, and/or can increase frequency and/or supply voltage back to normal level before normal processor operations are about to resume.


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