The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 20, 2022

Filed:

Jun. 07, 2021
Applicant:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;

Inventors:

Yi-Bo Liao, Hsinchu, TW;

Kai-Chieh Yang, Kaohsiung, TW;

Ching-Wei Tsai, Hsinchu, TW;

Kuan-Lun Cheng, Hsinchu, TW;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/8238 (2006.01); H01L 29/06 (2006.01); H01L 29/423 (2006.01); H01L 29/49 (2006.01); H01L 29/786 (2006.01); H01L 29/66 (2006.01); H01L 21/02 (2006.01); H01L 21/28 (2006.01); H01L 21/306 (2006.01); H01L 21/3065 (2006.01); H01L 27/092 (2006.01);
U.S. Cl.
CPC ...
H01L 21/823807 (2013.01); H01L 21/02532 (2013.01); H01L 21/02603 (2013.01); H01L 21/28088 (2013.01); H01L 21/3065 (2013.01); H01L 21/30625 (2013.01); H01L 21/823842 (2013.01); H01L 27/092 (2013.01); H01L 29/0673 (2013.01); H01L 29/42392 (2013.01); H01L 29/4908 (2013.01); H01L 29/4966 (2013.01); H01L 29/66545 (2013.01); H01L 29/78651 (2013.01); H01L 29/78684 (2013.01); H01L 29/78696 (2013.01);
Abstract

In an embodiment, a method includes: forming a first recess and a second recess in a substrate; growing a first epitaxial material stack in the first recess, the first epitaxial material stack including alternating layers of a first semiconductor material and a second semiconductor material, the layers of the first epitaxial material stack being undoped; growing a second epitaxial material stack in the second recess, the second epitaxial material stack including alternating layers of the first semiconductor material and the second semiconductor material, a first subset of the second epitaxial material stack being undoped, a second subset of the second epitaxial material stack being doped; patterning the first epitaxial material stack and the second epitaxial material stack to respectively form first nanowires and second nanowires; and forming a first gate structure around the first nanowires and a second gate structure around the second nanowires.


Find Patent Forward Citations

Loading…