Interconnect structures of three-dimensional memory devices

Abstract

Embodiments of 3D memory devices and methods for forming the same are disclosed. In an example, a method for forming a 3D memory device is disclosed. A dielectric stack including interleaved sacrificial layers and dielectric layers is formed above a substrate. A channel structure extending vertically through the dielectric stack is formed. A local dielectric layer is formed on the dielectric stack. A channel local contact opening through the local dielectric layer to expose an upper end of the channel structure, and a slit opening extending vertically through the local dielectric layer and the dielectric stack are simultaneously formed. A memory stack including interleaved conductive layers and the dielectric layers is formed by replacing, through the slit opening, the sacrificial layers with the conductive layers. A channel local contact in the channel local contact opening, and a slit structure in the slit opening are simultaneously formed.