The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 06, 2022

Filed:

Nov. 12, 2020
Applicant:

Macronix International Co., Ltd., Hsinchu, TW;

Inventor:

Min-Feng Hung, Hsing-Chu, TW;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/768 (2006.01); H01L 27/11582 (2017.01); H01L 23/528 (2006.01); H01L 23/00 (2006.01); H01L 23/522 (2006.01); H01L 21/311 (2006.01); H01L 21/3213 (2006.01); H01L 27/11565 (2017.01);
U.S. Cl.
CPC ...
H01L 21/76892 (2013.01); H01L 21/76805 (2013.01); H01L 23/5283 (2013.01); H01L 23/562 (2013.01); H01L 27/11582 (2013.01); H01L 21/31111 (2013.01); H01L 21/32134 (2013.01); H01L 23/5226 (2013.01); H01L 27/11565 (2013.01);
Abstract

A memory device is provided. The memory device includes a substrate, a stacked structure, and a contact. The substrate includes a memory array region and a staircase region. The stacked structure is located on the substrate in the memory array region and the staircase region. The stacked structure includes a plurality of conductive layers and a plurality of insulating layers alternately stacked on each other. Each of the plurality of conductive layers includes a main body and an end part. The main body is located in the memory array region and extends to the staircase region. The end part is connected to the main body and is located in the staircase region. A thickness of the end part is greater than a thickness of the main body. The contact lands on and is connected to the end part.


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