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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 11515402 B1

PDFFull Text
Date of Patent:
Nov. 29, 2022

Filed:

Mar. 30, 2016

Microelectronic transistor source/drain formation using angled etching

Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Seung Hoon Sung, Portland, OR (US);

Robert B. Turkot, Hillsboro, OR (US);

Marko Radosavljevic, Beaverton, OR (US);

Han Wui Then, Portland, OR (US);

Willy Rachmady, Beaverton, OR (US);

Sansaptak Dasgupta, Hillsboro, OR (US);

Jack T. Kavalieros, Portland, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:

Essential Patents Group, LLP

Primary Examiner:

Errol V Fernandes

Int. Cl.
CPC ...
H01L 29/66 (2006.01); H01L 21/3065 (2006.01); H01L 29/08 (2006.01); H01L 29/49 (2006.01);
U.S. Cl.
CPC ...
H01L 29/66636 (2013.01); H01L 21/3065 (2013.01); H01L 29/0847 (2013.01); H01L 29/4983 (2013.01); H01L 29/6656 (2013.01); H01L 29/66977 (2013.01);
Abstract

The present description relates to the fabrication of microelectronic transistor source and/or drain regions using angled etching. In one embodiment, a microelectronic transistor may be formed by using an angled etch to reduce the number masking steps required to form p-type doped regions and n-type doped regions. In further embodiments, angled etching may be used to form asymmetric spacers on opposing sides of a transistor gate, wherein the asymmetric spacers may result in asymmetric source/drain configurations.

Find Patent Forward Citations

Sung, Seung. (2022). Microelectronic transistor source/drain formation using angled etching (U.S. Patent No. 11515402). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/11515402

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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