The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 29, 2022
Filed:
Jul. 21, 2020
Applicant:
Globalfoundries U.s. Inc., Santa Clara, CA (US);
Inventors:
Anthony K. Stamper, Williston, VT (US);
Siva P. Adusumilli, South Burlington, VT (US);
Vibhor Jain, Essex Junction, VT (US);
Steven Bentley, Menands, NY (US);
Assignee:
GlobalFoundries U.S. Inc., Santa Clara, CA (US);
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/66 (2006.01); H01L 29/20 (2006.01); H01L 29/778 (2006.01); H01L 29/06 (2006.01); H01L 21/763 (2006.01); H01L 21/8234 (2006.01); H01L 29/36 (2006.01);
U.S. Cl.
CPC ...
H01L 29/66462 (2013.01); H01L 21/763 (2013.01); H01L 21/823493 (2013.01); H01L 29/0684 (2013.01); H01L 29/2003 (2013.01); H01L 29/36 (2013.01); H01L 29/66431 (2013.01); H01L 29/778 (2013.01); H01L 29/7786 (2013.01);
Abstract
Semiconductor structures including electrical isolation and methods of forming a semiconductor structure including electrical isolation. A layer stack is formed on a semiconductor substrate comprised of a single-crystal semiconductor material. The layer stack includes a semiconductor layer comprised of a III-V compound semiconductor material. A polycrystalline layer is formed in the semiconductor substrate. The polycrystalline layer extends laterally beneath the layer stack.