The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 29, 2022
Filed:
May. 28, 2020
Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;
Fang-Yu Liang, Taipei, TW;
Hsiu-Jen Lin, Hsinchu County, TW;
Kai-Chiang Wu, Hsinchu, TW;
Chih-Chiang Tsao, Taoyuan, TW;
Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;
Abstract
A semiconductor package and a manufacturing method thereof are provided. The semiconductor package includes a semiconductor die laterally covered by an insulating encapsulation, a first redistribution structure disposed on the semiconductor die and the insulating encapsulation, a second redistribution structure disposed opposite to the first redistribution structure, and a through insulating via (TIV) penetrating through the insulating encapsulation. The semiconductor die is electrically coupled to the first redistribution structure through the second redistribution structure and the TIV. The first redistribution structure includes a patterned conductive layer covered by a patterned dielectric layer, and under-ball metallurgy (UBM) pattern partially covered by the patterned dielectric layer. A first portion of the UBM pattern physically contacts a via portion of the patterned conductive layer which is tapered toward the UBM pattern, and a second portion of the UBM pattern is connected to the first portion and protruded from the patterned dielectric layer.