The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 29, 2022

Filed:

Dec. 29, 2020
Applicant:

United Microelectronics Corp., Hsin-Chu, TW;

Inventors:

Ching-Chih Chang, Tainan, TW;

Yuan-Fu Ko, Tainan, TW;

Chih-Sheng Chang, Tainan, TW;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/033 (2006.01); H01L 21/768 (2006.01); H01L 21/02 (2006.01); H01L 21/47 (2006.01); H01L 21/311 (2006.01);
U.S. Cl.
CPC ...
H01L 21/0337 (2013.01); H01L 21/02172 (2013.01); H01L 21/31144 (2013.01); H01L 21/47 (2013.01); H01L 21/76816 (2013.01); H01L 21/76831 (2013.01);
Abstract

The present invention further provides a method for forming a semiconductor device, the method including: first, a target layer is provided, an etching stop layer is formed on the target layer, a top oxide layer is formed on the etching stop layer, afterwards, a first photoresist layer is formed on the top oxide layer, and a first etching process is then performed, to form a plurality of first trenches in the top oxide layer. Next, a second photoresist layer is formed on the top oxide layer, portion of the second photoresist layer fills in each first trench, a second etching process is then performed to form a plurality of second trenches in the top oxide layer, and using the remaining etching stop layer as a hard mask, a third etching process is performed to remove parts of the etching stop layer and parts of the target layer.


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