The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 22, 2022

Filed:

Sep. 25, 2020
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Kyunghwan Lee, Seoul, KR;

Yongseok Kim, Suwon-si, KR;

Hyuncheol Kim, Seoul, KR;

Satoru Yamada, Yongin-si, KR;

Sungwon Yoo, Hwaseong-si, KR;

Jaeho Hong, Hwaseong-si, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/108 (2006.01); G11C 7/18 (2006.01);
U.S. Cl.
CPC ...
H01L 27/10805 (2013.01); G11C 7/18 (2013.01);
Abstract

Memory devices may include a source region, channels, a gate insulation layer pattern, a selection gate pattern, a first gate pattern, a second gate pattern and a drain region. The source region may include first impurities having a first conductivity type at an upper portion of a substrate. The channels may contact the source region. Each of the channels may extend in a vertical direction that is perpendicular to an upper surface of the substrate. The selection gate pattern may be on sidewalls of the channels. The first gate pattern may be on the sidewalls of the channels. The first gate pattern may be a common electrode of all of multiple channels. The second gate patterns may be on the sidewalls of the channels. The drain region may include second impurities having a second conductivity type that is different from the first conductivity type at an upper portion of each of the channels.


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