The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 15, 2022

Filed:

May. 13, 2021
Applicant:

Globalfoundries U.s. Inc., Malta, NY (US);

Inventors:

Selaka B. Bulumulla, Niskayuna, NY (US);

Koushik Ramachandran, Wappingers Falls, NY (US);

Benjamin V. Fasano, New Windsor, NY (US);

Assignee:

GlobalFoundries U.S. Inc., Malta, NY (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01Q 1/42 (2006.01); H01Q 1/50 (2006.01); H01Q 21/06 (2006.01);
U.S. Cl.
CPC ...
H01Q 1/422 (2013.01); H01Q 1/50 (2013.01); H01Q 21/064 (2013.01);
Abstract

Disclosed are embodiments of a microelectronics package that includes: first and second substrates (each having first and second sides); a chip; and a multi-element antenna connected to the chip. The chip is mounted on the first side of the first substrate. A first antenna element of the antenna is on the second side of the first substrate and electrically connected to the chip. The first side of the second substrate is adhered to the second side of the first substrate (i.e., covering the first antenna element). A second antenna element of the antenna is on the second side of the second substrate overlaying the first antenna element and physically separated therefrom by at least one ultra-low-K dielectric region within the first side of the second substrate and/or the second side of the first substrate. Optionally, the package includes multiple chips and/or multiple antennas. Also disclosed are associated method embodiments.


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