The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 01, 2022

Filed:

Jun. 03, 2021
Applicant:

United Microelectronics Corp., Hsin-Chu, TW;

Inventors:

Shin-Chuan Huang, Tainan, TW;

Chih-Tung Yeh, Taoyuan, TW;

Chun-Ming Chang, Kaohsiung, TW;

Bo-Rong Chen, Hsinchu County, TW;

Wen-Jung Liao, Hsinchu, TW;

Chun-Liang Hou, Hsinchu County, TW;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/778 (2006.01); H01L 29/20 (2006.01); H01L 29/78 (2006.01); H01L 29/205 (2006.01); H01L 29/423 (2006.01); H01L 29/66 (2006.01);
U.S. Cl.
CPC ...
H01L 29/205 (2013.01); H01L 29/42356 (2013.01); H01L 29/66462 (2013.01); H01L 29/7781 (2013.01); H01L 29/7788 (2013.01);
Abstract

A method for forming a high-electron mobility transistor is disclosed. A substrate is provided. A buffer layer is formed over the substrate. A GaN channel layer is formed over the buffer layer. An AlGaN layer is formed over the GaN channel layer. A GaN source layer and a GaN drain layer are formed on the AlGaN layer within a source region and a drain region, respectively. A gate recess is formed in the AlGaN layer between the source region and the drain region. A p-GaN gate layer is then formed in and on the gate recess.


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