The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 01, 2022

Filed:

Mar. 31, 2021
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Hyunsoo Chung, Hwaseong-si, KR;

Myungkee Chung, Hwaseong-si, KR;

Younglyong Kim, Anyang-si, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 25/065 (2006.01); H01L 23/538 (2006.01); H01L 23/31 (2006.01); H01L 23/12 (2006.01);
U.S. Cl.
CPC ...
H01L 25/0657 (2013.01); H01L 23/12 (2013.01); H01L 23/31 (2013.01); H01L 23/5386 (2013.01);
Abstract

A semiconductor package includes a package substrate, a lower package structure on the package substrate that includes a mold substrate, a semiconductor chip in the mold substrate having chip pads exposed through the mold substrate, spacer chips in the mold substrate and spaced apart from the semiconductor chip, and a redistribution wiring layer on the mold substrate that has redistribution wirings electrically connected to the chip pads, first and second stack structures on the lower package structure spaced apart from each other, each of the first and second stack structures including stacked memory chips, and a molding member covering the lower package structure and the first and second stack structures, wherein the mold substrate includes a first covering portion covering side surfaces of the semiconductor chip and the spacer chips, and a second covering portion covering a lower surface of the semiconductor chip.


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