The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 25, 2022

Filed:

Mar. 21, 2019
Applicant:

Globalfoundries U.s. Inc., Santa Clara, CA (US);

Inventors:

Yanping Shen, Saratoga Springs, NY (US);

Hui Zang, Guilderland, NY (US);

Jiehui Shu, Clifton Park, NY (US);

Assignee:

GlobalFoundries U.S. Inc., Santa Clara, CA (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/8234 (2006.01); H01L 29/66 (2006.01); H01L 21/3213 (2006.01); H01L 21/311 (2006.01); H01L 21/02 (2006.01); H01L 27/088 (2006.01); H01L 29/49 (2006.01); H01L 29/423 (2006.01);
U.S. Cl.
CPC ...
H01L 21/823468 (2013.01); H01L 21/02164 (2013.01); H01L 21/02167 (2013.01); H01L 21/31116 (2013.01); H01L 21/32136 (2013.01); H01L 21/823475 (2013.01); H01L 27/088 (2013.01); H01L 29/42376 (2013.01); H01L 29/4991 (2013.01); H01L 29/6653 (2013.01); H01L 29/6656 (2013.01); H01L 21/0228 (2013.01); H01L 29/66545 (2013.01);
Abstract

A method of forming an IC structure includes providing a metal gate structure, a spacer adjacent the metal gate structure and a contact to each of a pair of source/drain regions adjacent sides of the spacer. The spacer includes a first dielectric having a first dielectric constant. The metal gate structure is recessed, and the spacer is recessed to have an upper surface of the first dielectric below an upper surface of the metal gate structure, leaving a lower spacer portion. An upper spacer portion of a second dielectric having a dielectric constant lower than the first dielectric is formed over the lower spacer portion. A gate cap is formed over the metal gate structure and the upper spacer portion. The second dielectric can include, for example, an oxide or a gas. The method may reduce effective capacitance and gate height loss, and improve gate-to-contact short margin.


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