The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 18, 2022
Filed:
Dec. 23, 2020
Stacked vertical transistor erasable programmable read-only memory and programmable inverter devices
International Business Machines Corporation, Armonk, NY (US);
Alexander Reznicek, Troy, NY (US);
Karthik Balakrishnan, Scarsdale, NY (US);
Tak Ning, Yorktown Heights, NY (US);
Bahman Hekmatshoartabari, White Plains, NY (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
A method for manufacturing a semiconductor device includes forming a first vertical transistor on a semiconductor substrate, and forming a second vertical transistor stacked on the first vertical transistor. In the method, a silicide layer is formed on a first drain region of the first vertical transistor and on a second drain region of the second vertical transistor. The silicide layer electrically connects the first and second drain regions to each other.