The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 18, 2022

Filed:

Nov. 10, 2017
Applicant:

Air Water Inc., Sapporo, JP;

Inventors:

Mitsuhisa Narukawa, Matsumoto, JP;

Hiroki Suzuki, Matsumoto, JP;

Sumito Ouchi, Matsumoto, JP;

Assignee:

Air Water Inc., Sapporo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/02 (2006.01); C23C 16/34 (2006.01); C30B 25/18 (2006.01); C30B 29/38 (2006.01); H01L 29/16 (2006.01); H01L 29/20 (2006.01); H01L 29/205 (2006.01); H01L 29/267 (2006.01); H01L 29/778 (2006.01); H01L 29/812 (2006.01);
U.S. Cl.
CPC ...
H01L 21/0254 (2013.01); C23C 16/34 (2013.01); C30B 25/18 (2013.01); C30B 29/38 (2013.01); H01L 21/0262 (2013.01); H01L 21/02381 (2013.01); H01L 21/02447 (2013.01); H01L 21/02458 (2013.01); H01L 21/02505 (2013.01); H01L 21/02529 (2013.01); H01L 29/1608 (2013.01); H01L 29/2003 (2013.01); H01L 29/205 (2013.01); H01L 29/267 (2013.01); H01L 29/778 (2013.01); H01L 29/812 (2013.01); H01L 29/7786 (2013.01);
Abstract

A method for manufacturing a compound semiconductor substrate comprises: a step to form an SiC (silicon carbide) layer on a Si (silicon) substrate, a step to form a LT (Low Temperature)-AlN (aluminum nitride) layer with a thickness of 12 nanometers or more and 100 nanometers or less on the SiC layer at 700 degrees Celsius or more and 1000 degrees Celsius or less, a step to form a HT (High Temperature)-AlN layer on the LT-AlN layer at a temperature higher than the temperature at which the LT-AlN layer was formed, a step to form an Al (aluminum) nitride semiconductor layer on the HT-AlN layer, a step to form a GaN (gallium nitride) layer on the Al nitride semiconductor layer, and a step to form an Al nitride semiconductor layer on the GaN layer.


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