The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 18, 2022

Filed:

Sep. 20, 2021
Applicant:

Tsinghua University, Beijing, CN;

Inventors:

Xueqing Li, Beijing, CN;

Yiming Chen, Beijing, CN;

Xiaoyang Ma, Beijing, CN;

Mufeng Zhou, Beijing, CN;

Yushen Fu, Beijing, CN;

Yongpan Liu, Beijing, CN;

Huazhong Yang, Beijing, CN;

Assignee:

TSINGHUA UNIVERSITY, Beijing, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 7/10 (2006.01); G11C 7/12 (2006.01); H03K 19/20 (2006.01); G11C 8/08 (2006.01);
U.S. Cl.
CPC ...
G11C 7/1012 (2013.01); G11C 7/109 (2013.01); G11C 7/1063 (2013.01); G11C 7/12 (2013.01); G11C 8/08 (2013.01); H03K 19/20 (2013.01);
Abstract

The present disclosure relates to a static random-access memory and an electronic device. The memory includes at least one storage circuit, wherein the storage circuit includes a first inverter, a second inverter, a first switch, a second switch, a third switch, a fourth switch, a fifth switch, a word-line, a first bit-line, a second bit-line, a shift-input line, and a shift-output line. The circuit is used to access data by using the first bit-line and/or the second bit-line when it works in a first mode, and the circuit is used to shift the input data to the shift-input line and output the shifted data through the shift-output line when it works in a second mode. By implementing shift-input and shift-output within the memory, the disclosed embodiment can achieve high-concurrency data access and data update, and it also enables high integration and low power consumption.


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