The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 18, 2022
Filed:
Jan. 12, 2021
Global Unichip Corporation, Hsinchu, TW;
Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;
Ting-Hao Wang, Hsinchu, TW;
Ting-Chin Cho, Hsinchu, TW;
Hui-Ting Yang, Hsinchu, TW;
Yung-Sheng Fang, Hsinchu, TW;
Igor Elkanovich, Hsinchu, TW;
Amnon Parnass, Hsinchu, TW;
Chiung-Chi Lin, Hsinchu, TW;
Ming-Fu Tsai, Hsinchu, TW;
Global Unichip Corporation, Hsinchu, TW;
Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;
Abstract
A circuit is provided for providing a sampling clock to de-serializers in a communication physical layer. The circuit includes a slave delay lock loop (DLL), to receive an input clock and provide the sampling clock to the de-serializers. Further, a master DLL is included for receiving the input clock and outputting a control signal to the slave DLL to adjust a delay amount of the sampling clock of the slave DLL. The master DLL replicates a circuit of the slave DLL with a loop detection and determines the control signal for output.