The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 04, 2022
Filed:
Nov. 02, 2020
Intel Corporation, Santa Clara, CA (US);
Nasser Kurd, Portland, OR (US);
Praveen Mosalikanti, Portland, OR (US);
Thripthi Hegde, Beaverton, OR (US);
Mark Neidengard, Beaverton, OR (US);
Vaughn Grossnickle, Beaverton, OR (US);
Qi S. Wang, Portland, OR (US);
Kandadai Ramesh, Portland, OR (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
An apparatus is provided for autonomous security and functional safety (FUSA) of clock and voltages. The apparatus may include: a multiplexer having a first input communicatively coupled to a pin to receive a first clock external to a die, and a second input coupled to an output of a divider; an oscillator to provide a second clock; and a counter coupled to an output of the multiplexer and the oscillator, wherein the counter is to operate with the second clock and is to determine a frequency of the first clock. The apparatus may further include a voltage monitor circuitry for monitoring voltage(s) for FUSA, a reference generator for FUSA, a duty cycle monitor for FUSA, a frequency degradation monitor for FUSA, and a phase error degradation monitor for FUSA.