The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 20, 2022

Filed:

Aug. 18, 2021
Applicant:

Changxin Memory Technologies, Inc., Hefei, CN;

Inventors:

Weibing Shang, Hefei, CN;

Anping Qiu, Hefei, CN;

Chan Chen, Hefei, CN;

Kangling Ji, Hefei, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 5/134 (2014.01); H03K 5/00 (2006.01);
U.S. Cl.
CPC ...
H03K 5/134 (2014.07); H03K 2005/00123 (2013.01); H03K 2005/00195 (2013.01);
Abstract

A delay circuit and a delay structure are provided. The circuit includes: a first delay unit configured to delay a rising edge and/or a falling edge of a pulse signal, where, an input terminal of the first delay unit receives the pulse signal, and an output terminal of the first delay unit outputs a first delay signal, and a second delay unit, configured to delay the first delay signal, where an input terminal of the second delay unit is connected to the output terminal of the first delay unit, and an output terminal of the second delay unit outputs a second delay signal.


Find Patent Forward Citations

Quick Actions:

Shang, Weibing. (2022). Delay circuit and delay structure (U.S. Patent No. 11451219). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/11451219

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Loading…